Analogue Behavioural Modelling for Electronic Circuits
Abstract
In order to manage the design complexity of large integrated circuits it is required to simulate the complete system with its analogue sub-blocks at different abstraction levels. This is only possible by using behavioural models to reduce the circuit size and simulation time.
In the bottom-up verification phase of the design, the challenge of modelling is to reduce the circuit complexity with minimal effort, keeping only the relevant behaviour of the sub-blocks. Of particular importance are the automated modelling techniques. Their application is discussed using examples to illustrate the requirements to these techniques from the viewpoint of the circuit designer.
[DOI: 10.1685/CSC06143] About DOI
In the bottom-up verification phase of the design, the challenge of modelling is to reduce the circuit complexity with minimal effort, keeping only the relevant behaviour of the sub-blocks. Of particular importance are the automated modelling techniques. Their application is discussed using examples to illustrate the requirements to these techniques from the viewpoint of the circuit designer.
[DOI: 10.1685/CSC06143] About DOI
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